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A novel, efficient CNTFET Galois design as a basic ternary-valued logic field

Authors Keshavarzian P, Mirzaee MM

Received 22 October 2011

Accepted for publication 28 November 2011

Published 24 January 2012 Volume 2012:5 Pages 1—11

DOI https://doi.org/10.2147/NSA.S27550

Review by Single-blind

Peer reviewer comments 3


Peiman Keshavarzian1, Mahla Mohammad Mirzaee2
1Kerman Branch, Computer Engineering Department, Islamic Azad University, Kerman, Iran; 2Science and Research Branch, Computer Engineering Department, IA University, Kerman, Iran

Abstract: This paper presents arithmetic operations, including addition and multiplication, in the ternary Galois field through carbon nanotube field-effect transistors (CNTFETs). Ternary logics have received considerable attention among all the multiple-valued logics. Multiple-valued logics are an alternative to common-practice binary logic, which mostly has been expanded from ternary (three-valued) logic. CNTFETs are used to improve Galois field circuit performance. In this study, a novel design technique for ternary logic gates based on CNTFETs was used to design novel, efficient Galois field circuits that will be compared with the existing resistive-load CNTFET circuit designs. In this paper, by using carbon nanotube technology and avoiding the use of resistors, we will reduce power consumption and delay, and will also achieve a better product. Simulation results using HSPICE illustrate substantial improvement in speed and power consumption.

Keywords: galois field, CNTFET, MVL circuit design

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